1. Field of the Invention
The invention relates to a method of making semiconductor devices with high field inversion voltage as well as low PN junction leakage current, and low 1/f noise.
2. Description of the Prior Art
It is known that ionic charges at the semiconductor surface or in an oxide on the semiconductor surface may induce image charges in the semiconductor. The ionic charges may include the surface-state charge Q.sub.SS and the oxide charge, often designated by .rho..sub.x, which is discussed hereinafter. The image charges are often called "channels". Such ionic charges may also increase the extent of the depletion regions of PN junctions which terminate at the silicon surface near the ionic charge. The enlarged depletion regions enclose more trapping sites and recombination centers, thereby increasing the surface component of the PN junction reverse leakage currents. The exploration of this phenomenon can be found in many textbooks on semiconductor physics.
The above-mentioned 1/f noise or flicker noise in semiconductor devices "flicker noise" may be a serious problem at low frequencies. It is caused by carrier density fluctuations caused by certain modulation mechanisms, such as the surface field effect in MOS devices. The flicker noise or 1/f noise is believed to be due to the random fluctuation of density of the carriers at the location of the surface states, and is a dominant noise at very low frequencies. Regeneration-recombination noise in an IGFET is believed to be due to random fluctuation of the charge carriers at the recombination centers and trapping sites in the depletion regions of the semiconductor device. It has been shown that the 1/f type noise due to surface states may be reduced by decreasing Q.sub.SS. It is further known that the surface state charge affects the "field inversion voltage" at which the above-mentioned channels may be formed. Such channels may cause parasitic leakage currents which are harmful to circuit operation. Such parasitic leakage currents occur when the semiconductor surface is inverted to form a parasitic channel between two doped regions in the semiconductor device. Such channels may be induced by a charged conductor which crosses over a passivating oxide between the two doped regions. Such oxide is referred to as a "field oxide". The two doped regions, the field oxide, and the overlying conductor form a parasitic MOS device, whose threshold voltage is called the "field inversion voltage", designated V.sub.FI. The field inversion voltage is proportional to both Q.sub.SS and the oxide charge .rho..sub.x. Both Q.sub. SS and .rho..sub.x are very dependent on oxidizing procedures, temperature cycling, and annealing operations used in the manufacture of semiconductor devices.
For detailed discussion of surface effects on PN junctions and MOS devices, see "Physics and Technology of Semiconductor Devices" by A. S. Grove, John Wiley and Sons, Inc., New York, 1967 and, "Physics of Semiconductor Devices" by S. N. Sze, John Wiley and Sons, Inc., New York, 1969.
It is well known that surface states produced during oxidation may be virtually eliminated by various annealing processes, such as annealing of the silicon wafer in a helium ambient at temperatures greater than 800.degree. C. Such annealing processes are believed to cause completion of dangling or unsaturated silicon-oxygen bonds and elimination of the corresponding surface states. Various ambient gases present during the heat treatment may act as catalysts to the physical processes in which the dangling bonds are completed. For more detailed discussion of the foregoing subject matter, see "The Si-SiO.sub.2 Solid-Solid Interface System" by A. G. Revesz and K. H. Zaininger, RCA Review, March, 1968.
As mentioned above, various annealing procedures have been utilized to reduce Q.sub.SS, with the favorable results of reducing the surface component of junction leakage currents, reducing 1/f noise, and improving junction reverse breakdown characteristics. Unfortunately, the field inversion threshold is also lowered by such annealing steps, making the device more susceptible to the above-described parasitic channels. It is frequently necessary to have the magnitude of the field inversion voltage as high as possible, to prevent the parasitic channels from being turned on. Various techniques have been used in the past to avoid the problems which result from low magnitude field inversion voltages. Such steps have included use of heavily doped "channel stop" diffused regions which "interrupt" the parasitic channels and prevent current flow through them. This approach is very expensive because it may involve an extra processing step (for MOS processes), causing additional damage to the semiconductor surface because of the additional diffusion process required, and greatly reduces the component density of the semiconductor wafer because of the amount of silicon surface area required by the "channel stops". Thicker field oxides have also been utilized to increase the magnitude of field inversion voltage. It is desirable that the field oxide be as thick as possible from the view point of providing high magnitude field inversion voltage. However, thick field oxides are undesirable from many other points of view. In general, thick field oxides are incompatible with the goal of producing high density, high reliability integrated circuits, because spacings between diffused regions, metal regions, etc., must be greater for thick oxides. Reliability problems are frequently encountered for conductors which must run over steep edges of thick field oxide.
Ion implantation of the field region to increase the semiconductor surface impurity concentration is another technique which has been utilized to increase the field inversion voltage. However, this technique is very expensive, as it required expensive ion implantation equipment, and it is incompatible with certain bipolar processing techniques.
In short, the known techniques for improving electrical parameters in integrated circuits such as 1/f noise, reverse junction leakage current, reverse breakdown voltage, etc., have had the undesirable effect of also reducing the field inversion voltage. The known techniques for increasing the field inversion voltage without detrimentally effecting the 1/f noise, the leakage current, etc., have been unwieldy and expensive, reducing the component density on the semiconductor circuit, increasing its cost by requiring the addition of expensive additional processing steps.